Publication

POSTECH BEVIL LAB

Selected Journals

A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation
Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS 1
Page
1-11
Author
Sungyu Jeong; Won Joon Choi; Junung Choi; Anik Biswas; and Byungsub Kim
Year
2025
Date
06 October 2025
is part by NRF funded by Korean Government (MSIT) under Grant RS-2025-26068050
[ETRI] 50%

This work was supported by Institute & communications Technology Planning & Evaluation (IITP) grant funded by the Korea government (MSIT).

(No.RS-2025-02218027, Development of semiconductor design technology based on open source for PIM semiconductor design)

[openEDA] 20%


in part by Institute of Information & communications Technology Planning & Evaluation (IITP) grant funded by the Korea government(MSIT) (No. 2022-0-01171, A Development of Intelligent PHY Interface for High-Speed PIM Data Transfer); 

[PIM] 20%


in part by Korea Institude for Advancement of Technology (KIAT) Grant funded by Korea Government Ministry of Trade, Industry and Energy (MOTIE) through the Human Resource Development (HRD) Program for Industrial Innovation under Grant RS-2024-00401466

[산업혁신인재성장지원사업(반도체대학원)] 1%


This work was supported in part by BK21 FOUR Project of NRF for the Department of Electrical Engineering, POSTECH; 

[BK21] 9%