Publication

POSTECH BEVIL LAB

Selected Conferences

Total 28건 1 페이지

2023
28

"Review: A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits" Hyoseok Song, Kwangmin Kim, Changyoon Han, Byeongcheol Lee, and Byungsub Kim,
International SoC Design Conference (ISOCC) 2023, 2023

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2022
27

"A Cost-efficient FPGA-based Embedded System for Biosensor Platform" Iksu Jang, Jaeyoung Seo, Changjae Moon, and Byungsub Kim,
IEEE International SoC Design Conference (ISOCC), 2022

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26

"A Fast Eye Size Evaluation Method for High Speed Signal" Hyoseok Song, Kwangmin Kim, Changyoon Han, and Byungsub Kim,
International SoC Design Conference (ISOCC), 2022

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25

"A Layout Generator of Latch, Flip-Flop, and Shift Register for High-Speed Links" Junung Choi, Jaeik Cho, Won Joon Choi, Myungguk Lee, and Byungsub Kim,
International SoC Design Conference (ISOCC), 2022

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24

"A 50 Mb/s Full HBC TRX with Adaptive DFE and Variable-Interval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 0.75 Cycle/sec" Jaehyun Ko, Iksu Jang, Chanho Kim, Jihoon Park, Changjae Moon, Sooeun Lee and Byungsub Kim,
IEEE 48th European Solid-State Circuits Conference (Milan 2022), 2022

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23

"A Study On Reliable High-Speed HBC Enhanced by ECC for Wearable Neural Interfaces" Seungsik Moon, Jaehyun Ko, Byungsub Kim, Youngjoo Lee,
IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022

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22

"A 20-Gb/s/pin 0.0024-mm^2 Single-Ended DECS TRX with CDR-less Self-Slicing/Auto-Deserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCC/CDR-less Short-Reach Memory Interfaces" Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon and Byungsub Kim,
2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022

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21

"A 20Gb/s/pin 1.18pJ/b 1149μm2 Single-Ended Inverter-based 4-tap Addition-Only Feed-Forward Equalization Transmitter with Improved Robustness to Coefficient Errors in 28nm CMOS" Changjae Moon, Jaeyoung Seo, Myungguk Lee, Iksu Jang and Byungsub Kim,
2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022

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2020
20

"GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design" Seungho Han, Sungyu Jeong, Chanho Kim and Byungsub Kim,
57th ACM/IEEE Design Automation Conference (DAC), 2020

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2018
19

"Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects" Kyunghyun Lim, Minsoo Choi, Myat-Thu-Linn Aung, Kyunghwan Kim, Ji-Seong Kim, Rock-Hyun Baek, Ho-Jin Song, Tony Tae-Hyoung Kim, and Byungsub Kim,
2018 International SoC Design Conference (ISOCC), 2018

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18

"A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design" Yelim Youn, Kwangmin Kim and Byungsub Kim,
2018 International SoC Design Conference (ISOCC), 2018

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17

"A 12-Gb/s AC-Coupled FFE TX With Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 35-75Ω Z0 and 30-550Ω RRX" Minsoo Choi, Myungguk Lee and Byungsub Kim,
2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2018

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16

"A 7.8Gb/s/pin 1.96pJ/b Compact Single-Ended TRX and CDR with Phase-Difference Modulation for Highly-Reflective Memory Interfaces" Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park and Byungsub Kim,
2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018

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15

"A 16.6-pJ/b 150-Mb/s Body Channel Communication Transceiver with Decision Feedback Equalization Improving > 200x Area Efficiency" Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park and Byungsub Kim,
2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 2018

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2017
14

"A 10-GHz Multi-purpose Reconfigurable Built-in Self-Test Circuit for High-Speed Links" Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park and Byungsub Kim,
2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2017

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