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POSTECH BEVIL LAB
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1 페이지
2022
6
"A 6Gb/s Transceiver Design with Phase-Difference Modulation Signaling for Multi-drop DRAM Interface"
Chang Yoon Han, Jae Young Seo, Byung Sub Kim,
Journal of Integrated Circuits and Systems,
2022-06-30,
Vol 8,
2022
Download
LINK
2019
5
"Decision Feedback Equalization 기술을 이용한 인체 통신의 장점과 단점"
Byungsub Kim,
19th SOC학술대회,
2019
4
"AI 시대의 광대역 고효율 대병렬 I/O를 위한 Compact FFE TX구조"
Byungsub Kim,
19th RF/Analog CircuitWorkshop,
2019
2017
3
"A Coefficient-Error-Robust FFE for a Silicon Interposer Channel"
Seungho Han,
Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park and Byungsub Kim,
한국반도체학술대회,
2017
LINK
2013
2
"Revisiting High Speed Interconnect Channel Modeling for Scaled Wires"
Byungsub Kim,
제 13회 RF집적회로 기술 워크샵,
2013
1
"RC-dominant 채널의 간단한 전달함수 모델을 이용한 RC-dominant 인터커넥트 길이와 손실의 Trade-off 분석"
최민수,
심재윤, 박홍준, 김병섭,
대한전자공학회 SoC학술대회,
2013
LINK
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