A Fast Design Optimization of On-Chip Equalizing Links Using Particle Swarm Optimization
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol
- Vol XX
- Page
- 1 - 9
- Year
- 2024
- File
- A_Fast_Design_Optimization_of_On-Chip_Equalizing_Links_Using_Particle_Swarm_Optimization.pdf (7.1M) 228회 다운로드 DATE : 2024-12-07 21:32:38
- Link
- https://ieeexplore.ieee.org/document/10778978 295회 연결
(Early Access)
This work was supported in part by BK21 FOUR Project of NRF for the Department of Electrical Engineering, POSTECH;
[BK21] 0%
in part by National R&D Program through the National Research Foundation of Korea (NRF) funded by the Korea government (MSIT) (2020M3H2A107804521);
[바이오메디컬] 10%
in part by Institute of Information & communications Technology Planning & Evaluation (IITP) grant funded by the Korea government(MSIT) (No. 2022-0-01171, A Development of Intelligent PHY Interface for High-Speed PIM Data Transfer);
[PIM] 55%
in part by Samsung Electronics Co., Ltd (Cluster Academia Collaboration Program);
[삼성클러스터DT]
in part by Next-generation Intelligence semiconductor R&D Program through the National Research Foundation of Korea (NRF) funded by the Korea government (MSIT) (RS-2023-00258227);
[CIM] 35%
in part by Samsung Electronics Co., Ltd (IO201211-08055-01, POSTECH Samsung Semiconductor Education Program).
[삼성PSEP]