Publication

POSTECH BEVIL LAB

Selected Conferences

A 20-Gb/s/pin 0.0024-mm^2 Single-Ended DECS TRX with CDR-less Self-Slicing/Auto-Deserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCC/CDR-less Short-Reach Memory Interfaces 
Year
2022 
Author
Jaeyoung Seo 
Co-author
Sooeun Lee, Myungguk Lee, Changjae Moon and Byungsub Kim 
Conference
2022 IEEE International Solid- State Circuits Conference (ISSCC) 
File
A_20-Gb_s_pin_0.0024-mm2_Single-Ended_DECS_TRX_with_CDR-less_Self-Slicing_Auto-Deserialization_to_Improve_Tolerance_on_Duty_Cycle_Error_and_RX_Supply_Noise_for_DCC_CDR-less_Sho.pdf (1,018.7K) 77회 다운로드 DATE : 2022-05-01 18:32:10

This work was supported by


1. the Commercializations Promotion Agency for R&D Outcomes (COMPA) grant funded by the Korea government (MSIT) (No. 2021I100) (80%)

2. Samsung Electronics Co., Ltd (IO201211-08055-01)

3. BK21 FOUR project of NRF for the Department of Electrical Engineering, POSTECH (20%)

4. IDEC