A 50 Mb/s Full HBC TRX with Adaptive DFE and Variable-Interval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 0.75 Cycle/sec
- Year
- 2022
- Author
- Jaehyun Ko
- Co-author
- Iksu Jang, Chanho Kim, Jihoon Park, Changjae Moon, Sooeun Lee and Byungsub Kim
- Conference
- IEEE 48th European Solid-State Circuits Conference (Milan 2022)
- Link
- https://ieeexplore.ieee.org/document/9911296 54회 연결
This work was supported in part by COMPA grant funded by the Korea government (MIST) (No. 2021I100) (60%)
; in part by the MIST, Korea, under the ITRC support program (IITP-2021-0-02052) supervised by the IITP (20%)
; in part by the BK21 FOUR Project of NRF for the Dept. of EE, POSTECH (20%)
; in part by Samsung Electronics Co., Ltd (Cluster Academia Collaboration Program, POSTECH Samsung Semiconductor Education Program).
Authors also appreciate IDEC for tool support and Samsung Electronics for chip fabrication.