Publication

POSTECH BEVIL LAB

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A 6Gb/s Transceiver Design with Phase-Difference Modulation Signaling for Multi-drop DRAM Interface 
Year
2022 
Author
Chang Yoon Han, Jae Young Seo, Byung Sub Kim 
Conference
Journal of Integrated Circuits and Systems 
Status
2022-06-30 
Vol
Vol 8 
File
A 6Gbps Transceiver Design with Phase-Difference Modulation Signaling for Multi-drop DRAM Interface.pdf (519.0K) 61회 다운로드 DATE : 2023-02-21 15:43:09

The chip fabrication and EDA tool were supported by IC Design Education Center (IDEC), Korea. (50%)

This work was supported in part by the Ministry of Science and ICT (MSIT), Korea, under the Information Technology Research Center (ITRC) support program (IITP-2021-0-02052) supervised by the Institute for Information & Communications Technology Planning & Evaluation (IITP).  (50%)

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